Job Details

Verification Infrastructure Lead - CPU Hardware Development

Verification Infrastructure Lead - CPU Hardware Development

2 weeks ago Be among the first 25 applicants

Get AI-powered advice on this job and more exclusive features.

This range is provided by I Machines, Inc.. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$220,000.00/yr - $260,000.00/yr

Additional compensation types

Annual Bonus and Stock options

Direct message the job poster from I Machines, Inc.

We are seeking an experienced and driven Verification Infrastructure Lead to architect, develop, and scale our verification infrastructure for CPU hardware development. You will play a pivotal role in defining and building the tools, frameworks, and workflows that enable our RTL design and verification teams to efficiently validate complex, high-performance CPU architectures.

This is a high-impact role that blends technical leadership with hands-on development and collaboration across hardware design, DV, emulation, firmware, and software teams.

Responsibilities will also include:

• Design and maintain scalable, reusable verification infrastructure supporting simulation, formal, emulation, and FPGA platforms for CPU RTL verification
• Develop automation scripts and frameworks for build, test execution, regressions, triage, and coverage analysis across multiple environments (e.g., Synopsys VCS, Spyglass, ZeBu, FPGA).
• Automate efficient usage of cloud infrastructure and ability scale up and down with PPU clusters
• Integrate industry-standard tools (UVM, SystemVerilog, DPI, VPI, waveform viewers, simulators, emulators, debuggers) into unified and efficient workflows.
• Drive integration with test management systems (github actions, execman) and databases (e.g., JIRA, MongoDB, ElasticSearch) for test tracking, triage, and visualization.
• Build scalable verification services (containerized or cloud-native) for on-demand execution, resource scaling, and user-friendly interfaces for engineers.
• Partner with RTL, DV, and firmware/software teams to align infrastructure with CPU development goals.
• Define and monitor KPIs for regression stability, bug turnaround, and infrastructure health. Build dashboards for visibility and actionable insights.
• Develop, deploy, and manage a fleet of advanced coding agents and AI chatbots to support business-critical operations.
• Actively monitor, secure, and ensure the integrity of data connections, specifically governing the traffic through our connectors and MCP servers.

Behavioral traits that we are looking for:

• Strong verbal and written communication skills, and clarity in technical communications.
• Self-starter with the ability to work independently, and an aptitude to learn new things quickly.
• Ability to work in a dynamic and team-oriented environment.

Qualifications & Minimum skills:

• MS or PhD in EE or Computer Engineering.
• 10+ years of hands on experience in core verification and infrastructure development .
• Expertise in SystemVerilog, Python, Shell scripting, Make/CMake, Git, Jenkins.
• Deep understanding of verification methodologies (UVM) ,tools, test planning, coverage collection, and test automation.
• Experience with simulators (VCS, Spyglass), emulators (ZeBu), and waveform debugging tools (Verdi) , monitors
• Experience with cloud-based verification (AWS, Azure) and container orchestration (Docker, Kubernetes).
• Experience with running SNPS based tools on self-hosted github runners on Azure cloud
• Familiarity with formal tools (Jasper, VC Formal) and integration into infrastructure.
• Experience building custom triage tools (e.g., waveform correlation, error classification).
• Exposure to RISC-V, ARM, or x86 verification environment
• Prior experience leading a small infrastructure or DV tools team.

Preferred skills and experience:

• Strong CPU microarchitecture knowledge especially on core micro architecture that includes fetch, branch prediction, renaming, out of order execution, load/store unit, coherency protocols and memory subsystem, system interfaces, interrupt architecture, Debug architecture, bus interface protocols (CHI, AXI, APB)

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Semiconductor Manufacturing

Referrals increase your chances of interviewing at I Machines, Inc. by 2x

Inferred from the description for this job

Medical insurance

Vision insurance

401(k)

Get notified when a new job is posted.

Sign in to set job alerts for “Infrastructure Specialist” roles.

Sunnyvale, CA $168,000.00-$276,000.00 5 days ago

San Jose, CA $113,600.00-$170,400.00 2 weeks ago

San Jose, CA $100,000.00-$110,000.00 1 month ago

Milpitas, CA $96,000.00-$163,200.00 1 week ago

Sunnyvale, CA $156,000.00-$229,000.00 2 weeks ago

Tech Lead Manager, Infrastructure Platform - San Jose

San Jose, CA $224,000.00-$410,000.00 1 week ago

Sunnyvale, CA $130,000.00-$160,000.00 1 week ago

Sunnyvale, CA $156,000.00-$229,000.00 1 week ago

Sunnyvale, CA $122,000.00-$174,000.00 1 week ago

Sunnyvale, CA $141,000.00-$202,000.00 1 week ago

Palo Alto, CA $225,000.00-$300,000.00 2 weeks ago

Palo Alto, CA $149,500.00-$184,000.00 2 weeks ago

Systems Engineer - CONOPS & Mission Operations

San Jose, CA $60,000.00-$75,000.00 1 week ago

Santa Clara, CA $148,000.00-$276,000.00 2 days ago

San Jose, CA $130,000.00-$182,000.00 4 months ago

Mountain View, CA $144,000.00-$176,000.00 2 weeks ago

Lead Engineer– Infrastructure Operations

Mountain View, CA $100,000.00-$110,000.00 1 year ago

Santa Clara, CA $90,000.00-$140,000.00 1 month ago

We're unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.